I would like first thank you for your very helpful posts.
My question is about the interface between PS and PL from software perspective. In Microblaze processor, we achieve communication between HW and SW via FSL or PLB channel. For FSL channel, for instance, we use put, cput etc functions in software to access this FSL channel, which is connected to HW unit. In AXI interface, which functions are responsible to send to or receive from data from PL to software. I examined your code and Xil_In32 and Xil_Out32 commands are used. I searched lots of documents to find related documentation for this issue. I know AXI has memory mapped interface and one can send or receive data using the memory address. Is there any other functions or commands in software which helps to communicate with AXI interfaced HW ? Related Xilinx documentation is also very helpful for this.
He didn't show it above but there is an address tab that you can use to see the exact address that was selected and adjust the addressable size, the default is 64K. The FSL analogy for Zynq is the Accelerated Coherency Port (ACP) that is used with the Snoop Control Unit (SCU) in the ARM core and enables the device in Programmable Logic to write to L2 cache and then the processor can access it, the SCU maintains cache coherency. See link below.
This is great. Sounds like a great fast way to get started on this complex tool chain.
It isn't working so well for me at the moment. I installed the Xilinx tools, I got the license using the zedboard coupon. I can see the licenses are in place from XPS and ISE.
I get about halfway through and XPS says "A license was not found for the XPS feature. It prompts me to get the license from the web, everything checks out ok. When XPS gets to the window that says "Launching XPS for configuring embedded source 'proc module', XPS seems to hang and the progress window never completes. Hitting the cancel button results in XPS saying "cancelling..." but it never does. I have to kill processes from Task manager.
I suspect there may be a problem with licensing. I've tried uninstalling and reinstalling the software to no avail.
Hey I am doing project with zedboard I add my own ip uart 16750 I tested it in scan it's work, now I want use it in interruption unfortunately my function handler don't trigger when the switch change status. I search example but in this example there is'nt example with the custom peripheral the ip used is Axi gpio or Axi timer but I don't want use it. For example in this link http://www.xilinx.com/support/answers/50572.htm I want replace the Axi timer in the figure by my own ip. I don't know if it 's a problem hw or sw. Best regards.
I would like first thank you for your very helpful posts.
ReplyDeleteMy question is about the interface between PS and PL from software perspective. In Microblaze processor, we achieve communication between HW and SW via FSL or PLB channel. For FSL channel, for instance, we use put, cput etc functions in software to access this FSL channel, which is connected to HW unit. In AXI interface, which functions are responsible to send to or receive from data from PL to software. I examined your code and Xil_In32 and Xil_Out32 commands are used. I searched lots of documents to find related documentation for this issue. I know AXI has memory mapped interface and one can send or receive data using the memory address. Is there any other functions or commands in software which helps to communicate with AXI interfaced HW ? Related Xilinx documentation is also very helpful for this.
ismail.
Hi,
ReplyDeleteyou can comunicate with AXI interface HW with memory mapped :
//
// Read
//
u32 Xil_In32(u32 Addr)
{
SYNCHRONIZE_IO;
return *(volatile u32 *) Addr;
}
//
// Write
//
void Xil_Out32(u32 OutAddress, u32 Value)
{
*(volatile u32 *) OutAddress = Value;
SYNCHRONIZE_IO;
}
You can found source code on :
..\bsp\ps7_cortexa9_0\libsrc\standalone_v3_06_a\src\xil_io.c
You can read/write register or fifo hardware with this routine.
If you need more throughout with less override, to communicate with AXI interfaced HW, use DMA feature.
Kappasm.
Ismail,
ReplyDeleteHe didn't show it above but there is an address tab that you can use to see the exact address that was selected and adjust the addressable size, the default is 64K. The FSL analogy for Zynq is the Accelerated Coherency Port (ACP) that is used with the Snoop Control Unit (SCU) in the ARM core and enables the device in Programmable Logic to write to L2 cache and then the processor can access it, the SCU maintains cache coherency. See link below.
http://www.xilinx.com/support/documentation/data_sheets/ds190-Zynq-7000-Overview.pdf
Also check out this link for everything you ever wanted to know about Zynq.
http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
This is great. Sounds like a great fast way to get started on this complex tool chain.
ReplyDeleteIt isn't working so well for me at the moment. I installed the Xilinx tools, I got the license using the zedboard coupon. I can see the licenses are in place from XPS and ISE.
I get about halfway through and XPS says "A license was not found for the XPS feature. It prompts me to get the license from the web, everything checks out ok. When XPS gets to the window that says "Launching XPS for configuring embedded source 'proc module', XPS seems to hang and the progress window never completes. Hitting the cancel button results in XPS saying "cancelling..." but it never does. I have to kill processes from Task manager.
I suspect there may be a problem with licensing. I've tried uninstalling and reinstalling the software to no avail.
Any thoughts on how to troubleshoot this problem?
I'm having the same problem. Someone help!
DeleteHi,
ReplyDeleteI want to add my own package file in the user logic, but synthesis tool is unable to find it. Plz give me some tips. Thanks in advance.
BR
Babar
Hey
ReplyDeleteI am doing project with zedboard I add my own ip uart 16750 I tested it in scan it's work, now I want use it in interruption unfortunately my function handler don't trigger when the switch change status. I search example but in this example there is'nt example with the custom peripheral the ip used is Axi gpio or Axi timer but I don't want use it. For example in this link http://www.xilinx.com/support/answers/50572.htm I want replace the Axi timer in the figure by my own ip.
I don't know if it 's a problem hw or sw.
Best regards.